DocumentCode
139405
Title
Empirical nonlinear HFET gate charge model
Author
Pasciuto, B. ; Limiti, Ernesto
Author_Institution
Dept. of Electron. Eng., Univ. of Rome Roma Tre, Rome, Italy
fYear
2014
fDate
2-4 April 2014
Firstpage
1
Lastpage
3
Abstract
An empirical Gate charge model for HFET suitable for implementation in CAD environments is proposed. The model consists of a single Gate charge nonlinear expression as function of two controlling voltages. Such model follows a recently published modeling approach named Current Division. A comparison is carried out between capacitance values extracted from FET measurements and modeled capacitance values derived from the proposed expression.
Keywords
capacitance; high electron mobility transistors; semiconductor device models; CAD environments; Current Division; FET measurements; HFET; empirical gate charge model; gate charge nonlinear expression; modeled capacitance values; Capacitance; HEMTs; Integrated circuit modeling; Logic gates; Mathematical model; Solid modeling; Capacitance; Field Effect Transistors; Nonlinear Semiconductor Device Models;
fLanguage
English
Publisher
ieee
Conference_Titel
Integrated Nonlinear Microwave and Millimetre-wave Circuits (INMMiC), 2014 International Workshop on
Conference_Location
Leuven
Type
conf
DOI
10.1109/INMMIC.2014.6815071
Filename
6815071
Link To Document