Architectural techniques for eliminating critical feedback paths

The authors demonstrate architectural techniques, for small-state feedback circuits that significantly improve the throughput without requiring circuit design efforts or advanced technologies. The method is flexible in terms of achievable implementations and speedups. The authors discuss a new high-throughput solution for systems with finite-level feedback values. As an example, the authors consider coding and signal processing systems for optical communications, which usually have very simple feedback. The authors demonstrate the method by realizing a 2 micron CMOS layout of a bimode 3B4B line coder. Simulation results show that, using standard cell design, the chip achieves a coding rate of 1.4 Gb/s. Other design options are discussed