Title :
Fringing-induced barrier lowering (FIBL) in sub-100 nm MOSFETs with high-K gate dielectrics
Author :
Yeap, G.C.F. ; Krishnan, S. ; Lin, Ming-Ren
Author_Institution :
Adv. Micro Devices Inc., Sunnyvale, CA, USA
fDate :
5/28/1998 12:00:00 AM
Abstract :
Fringing-induced barrier lowering (FIBL), a new anomalous degradation in device turn-off/on characteristics in sub-100 nm devices with high-K gate dielectrics, is reported. FIBL is clearly evident for K>25 and worsens as K increases (without buffer oxide). With a buffer oxide, FIBL can be completely suppressed for K<25, and partially for higher K. FIBL worsens as the gate length becomes shorter. Complete removal of high-K dielectrics on the active area induces a smaller FIBL
Keywords :
MOSFET; capacitance; dielectric thin films; permittivity; semiconductor device models; 100 nm; FIBL suppression; MOSFETs; anomalous degradation; buffer oxide; device turnoff/on characteristics; fringing-induced barrier lowering; high-K gate dielectrics;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19980800
