Effects of irradiation temperature on MOS radiation response

Effects of irradiation and annealing temperature on radiation-induced charge trapping are explored for MOS transistors. Transistors were irradiated with 10-keV X-rays at temperatures from -25 to 100°C and annealed at 100°C for times up to 3.6×10⁶ s. Transistor data were analyzed for the contributions of radiation-induced charge due to oxide traps, border traps, and interface traps. Increased irradiation temperature resulted in increased interface-trap and border-trap buildup and decreased oxide-trapped charge buildup during irradiation. Interface-trap buildup immediately following irradiation for transistors irradiated at 100°C was equivalent to the buildup of interface traps in transistors irradiated at 27°C and annealed for one week at 100°C (standard rebound test). For the p-channel transistors, a one-to-one correlation was observed between the increase in interface-trap charge and the decrease in oxide-trapped charge during irradiation. This may imply a link between increased interface-trap buildup and the annealing of oxide-trapped charge in these devices. The observed data can be-explained in terms of increased hydrogen ion transport rates to the Si/SiO₂ interface during elevated temperature irradiations. These results have implications on hardness assurance testing and potentially may be used to reduce costs associated with rebound qualification