Title :
Wafer-Testing of Optoelectonic–Gigascale CMOS Integrated Circuits
Author :
Thacker, Hiren D. ; Ogunsola, Oluwafemi O. ; Muler, A.V. ; Meindl, James D.
Author_Institution :
Sun Labs. at Oracle, San Diego, CA, USA
Abstract :
Gigascale integration (GSI) chips with high bandwidth, integrated optoelectronics (OE), and photonic components are an emerging technology. In this paper, we present the prospects and opportunities for wafer-testing of chips with electrical and optical I/O interconnects. The issues and requirements of testing OE-GSI ICs during high-volume manufacturing are identified and discussed. Two probe substrate technologies based on microelectromechanical systems (MEMS) for simultaneously interfacing with a multitude of surface-normal optical I/Os and high-density electrical I/Os are detailed. The first probe substrate comprises vertically compliant probes for contacting electrical I/Os and grating-in-waveguide I/Os for optical probing. The second MEMS probe module uses microsockets and through-substrate interconnects to contact pillar-shaped electrical and optical I/Os and to redistribute signals, respectively.
Keywords :
CMOS integrated circuits; integrated optics; integrated optoelectronics; micro-optomechanical devices; optical fabrication; optical interconnections; optical testing; wafer-scale integration; MEMS; electrical interconnects; gigascale integration chips; microelectromechanical systems; microsockets; optoelectonic-gigascale CMOS integrated circuits; surface-normal optical I/O interconnects; wafer-testing; Adaptive optics; Integrated optics; Optical imaging; Optical receivers; Optical sensors; Probes; Testing; CMOS photonic testing; compliant probe; microelectromechanical systems (MEMS) probe; optical I/O; optoelectronic (OE) testing; through-silicon via (TSV);
Journal_Title :
Selected Topics in Quantum Electronics, IEEE Journal of
DOI :
10.1109/JSTQE.2010.2089431
