Title :
Modeling circuit parasitics. II
Author :
Wadell, Brian C.
fDate :
6/1/1998 12:00:00 AM
Abstract :
In the previous part the author introduced zero-length models for circuit parasitics (i.e., lumped elements) and showed how one can estimate the resistance of conductors and dielectrics. In this installment he looks at inductive parasitics and considers the following topics: component leads; PCB traces; vias; and other inductive parasitics
Keywords :
circuit theory; conductors (electric); inductance; inductors; modelling; printed circuits; PCB traces; circuit parasitics; component leads; inductive parasitics; lumped elements; vias; zero-length models; Capacitors; Circuits; Connectors; Inductance; Inductors; Laser beam cutting; Lead; Resistors; Voltage; Wire;
Journal_Title :
Instrumentation & Measurement Magazine, IEEE
DOI :
10.1109/5289.685491