Optimized frequency-shaping circuit topologies for LDOs

Typical low drop-out (LDO) regulator architectures suffer from an inherent load regulation performance limitation. This limitation manifests itself through limited DC open-loop gain, and results from stringent closed-loop bandwidth requirements. The frequency response of the system is highly sensitive to the loading conditions, thereby making proper compensation a laborious endeavor. This paper discusses and addresses the limitation on regulating performance imposed by frequency compensation. Several LDO circuit topologies are subsequently developed to this end. They enhance load regulation performance by relaxing the DC open-loop gain restrictions. The circuit structures essentially alter the frequency response of the system via the error amplifier. A low drop-out regulator adopting an embodiment of the proposed technique was fabricated in the MOSIS 2-μm process technology. The system, designed for an output capacitor of 4.7 μF, was stable with an equivalent series resistance (ESR) ranging from 0 to 12 Ω, bypass capacitors ranging from 0 to 2.2 μF, and a load current ranging from 0 to 50 mA