DocumentCode
1398129
Title
Array-based analog computation
Author
Kramer, Alan H.
Author_Institution
Innovative Syst. Design Group, SGS-Thomson Microelectron., Milan, Italy
Volume
16
Issue
5
fYear
1996
fDate
10/1/1996 12:00:00 AM
Firstpage
20
Lastpage
29
Abstract
The Innovative Systems Design Group at SGS-Thomson Microelectronics has been exploring analog implementations of neural network architectures with special emphasis on efficiency, precision, and large-scale implementation. We are developing three large-scale analog VLSI chips, all of which work on image-processing problems. Because of their efficiency and regularity, analog computing arrays form the basis of our designs, which use current, charge, and conductance computing modes. We have also investigated the use of floating-gate flash-EEPROM devices for both nonvolatile analog storage and computation
Keywords
neural chips; neural net architecture; SGS-Thomson Microelectronics; analog computation; analog implementations; neural network architectures; nonvolatile analog storage; Analog computers; Area measurement; Circuits; Computer architecture; Computer networks; Concurrent computing; Costs; Large-scale systems; Neural networks; Very large scale integration;
fLanguage
English
Journal_Title
Micro, IEEE
Publisher
ieee
ISSN
0272-1732
Type
jour
DOI
10.1109/40.540077
Filename
540077
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