Title :
Low-frequency gain-enhanced CMOS operational amplifier
Author :
Aggarwal, S. ; Bhattacharyya, A.B.
Author_Institution :
Centre for Appl. Res. in Electron., Indian Inst. of Technol., New Delhi, India
fDate :
4/1/1991 12:00:00 AM
Abstract :
To achieve a high gain in a CMOS operational amplifier is difficult because of the inherent low transconductance of MOS transistors. In the paper, a gain-enhanced CMOS operational amplifier that uses a modified differential input stage is presented. The proposed input stage is derived from a cascode differential amplifier and provides a gain improvement of 16 dB over that of the cascode stage. The CMOS differential amplifier has been prototyped on silicon with a 5 μm p-well CMOS technology. Measurements made on the test chip confirm the SPICE simulated results. Simulations of the operational amplifier show improvement with respect to the gain, bandwidth, PSRR at high frequencies and slew rate, rendering it suitable for low-frequency applications
Keywords :
CMOS integrated circuits; linear integrated circuits; operational amplifiers; 5 micron; PSRR; Si; bandwidth; cascode differential amplifier; gain improvement; gain-enhanced CMOS operational amplifier; modified differential input stage; p-well CMOS technology; slew rate; transconductance;
Journal_Title :
Circuits, Devices and Systems, IEE Proceedings G