DocumentCode :
1399362
Title :
Using the Memory Channel Network
Author :
Gillett, Richard ; Kaufmann, Richard
Author_Institution :
Digital Equip. Corp., USA
Volume :
17
Issue :
1
fYear :
1997
Firstpage :
19
Lastpage :
25
Abstract :
Digital has announced and shipped this first-generation, high-performance network for clusters, the Memory Channel for PCI network, and all SMP AlphaServers running Digital Unix support it. Digital has publicly demonstrated Memory Channel-connected systems running Windows/NT. The Memory Channel network does not require functionality beyond the PCI bus specification and works with any system having a PCI I/O slot. Production Memory Channel clusters can be as large as eight nodes (limited only by first-generation hardware) of 12 processors each (96 processors). One such cluster installed at Supercomputing 95 ran clusterwide applications using High Performance Fortran, PVM, and MPI. A four-node, 48 processor Memory Channel cluster, using Oracle Parallel Server, has held the record for TPC-C benchmarks since its introduction in April 1996. The same Memory Channel network used to connect this high-end database configuration also cost-effectively supports configuration of two-node, single-processor clusters. Latency over Memory Channel for a one-way, user-process-to-user-process message is 2.9 microseconds. The processor overhead is less than 150 ns for a 32-byte message. Standard message-passing APIs benefit greatly from this underlying capability
Keywords :
DEC computers; computer networks; network interfaces; Digital; Memory Channel; Memory Channel Network; PCI bus; message-passing; network for clusters; Delay; Hardware; Operating systems; Read-write memory; Runtime library; System buses; Wires;
fLanguage :
English
Journal_Title :
Micro, IEEE
Publisher :
ieee
ISSN :
0272-1732
Type :
jour
DOI :
10.1109/40.566189
Filename :
566189
Link To Document :
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