DocumentCode :
1399888
Title :
Grounded-gate nMOS transistor behavior under CDM ESD stress conditions
Author :
Verhaege, Koen ; Russ, Christian ; Luchies, Jan-Marc ; Groeseneken, Guido ; Kuper, Fred G.
Author_Institution :
IMEC, Leuven, Belgium
Volume :
44
Issue :
11
fYear :
1997
fDate :
11/1/1997 12:00:00 AM
Firstpage :
1972
Lastpage :
1980
Abstract :
This paper contains a systematic study into the effects of design and process variations on the behavior of the grounded-gate nMOS transistor under CDM ESD stress conditions. The correlation of both electrical behavior and physical failure is evaluated for socketed CDM, nonsocketed CDM, and HBM ESD stress models. It is shown that a new compact transistor model, concerning its application for the simulation of CDM behavior, is employed in electro-thermal simulation to explain the experimental results
Keywords :
MOSFET; electrostatic discharge; failure analysis; semiconductor device models; semiconductor device reliability; CDM ESD stress conditions; HBM ESD stress models; charged device model; electrical behavior; electro-thermal simulation; grounded-gate nMOS transistor; nonsocketed CDM; physical failure; process variations; socketed CDM; Circuit testing; Electrostatic discharge; Geometry; Integrated circuit modeling; Integrated circuit packaging; MOSFETs; Protection; Semiconductor device packaging; Solid modeling; Stress;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/16.641368
Filename :
641368
Link To Document :
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