Title :
Optimised weighted-resistor digital to analogue converter
Author_Institution :
Dept. of Electr. Eng., Indian Inst. of Technol., Bombay, India
fDate :
6/1/1998 12:00:00 AM
Abstract :
From the classical weighted-resistor (WR) digital to analogue converter (DAC), two-stage DACs are derived. Conditions for minimum spread and the minimum total resistance for the two-stage DACs are derived. The theory is extended to multistage WR DACs. Thus, an optimised WR DAC is obtained that has minimum spread and the minimum total resistance and is therefore, suitable for economic fabrication in integrated circuit form
Keywords :
circuit optimisation; digital-analogue conversion; circuit optimisation; minimum spread; minimum total resistance; multistage WR DACs; two-stage DACs; weighted-resistor digital to analogue converter;
Journal_Title :
Circuits, Devices and Systems, IEE Proceedings -
DOI :
10.1049/ip-cds:19981814
