Title :
New CMOs resistor implementation for linear IC applications
Author :
VanPeteghem, P.M. ; Rice, G.L.
Author_Institution :
Texas A&M Univ., College Station, TX
fDate :
3/3/1988 12:00:00 AM
Abstract :
A new CMOS implementation for a linearised floating resistance is presented, where the resistor value depends only on the β of a matched set of nMOS transistors, and on a bias current I B; it is independent of the threshold voltage V T. Simulated worst-case linearity for a unity-gain amplifier is around 1% for a ±2 V output swing
Keywords :
CMOS integrated circuits; integrated circuit technology; linear integrated circuits; operational amplifiers; 2 V; CMOS floating resistor; CMOS linear ICs; CMOs resistor implementation; bias current; linear IC applications; linearised floating resistance; matched set of nMOS transistors; unity-gain amplifier; worst-case linearity;
Journal_Title :
Electronics Letters
