Title :
Bringing up a chip on the cheap
Author :
Wachs, Matthias ; Shacham, O. ; Asgar, Z. ; Firoozshahian, A. ; Richardson, S. ; Horowitz, Mark
Author_Institution :
Electr. Eng. Dept., Stanford Univ., Stanford, CA, USA
Abstract :
Booting and debugging the functionality of silicon samples are known to be challenging and time-consuming tasks, even more so in cost-constrained environments. The authors describe their creative solutions used to bring up Stanford Smart Memories (SSM), a 55-million transistor research chip.
Keywords :
storage management chips; Stanford Smart Memories; cost constrained environment; debugging; silicon samples; time consuming task; transistor research chip; Debugging; Field programmable gate arrays; System-on-a-chip; Testing; BEE2; Bringup; FPGA; JTAG; Smart Memories;
Journal_Title :
Design & Test of Computers, IEEE
DOI :
10.1109/MDT.2011.2179849
