Title :
Polyoxide thinning limitation and superior ONO interpoly dielectric for nonvolatile memory devices
Author :
Mori, Seichi ; Arai, Norishisa ; Kaneko, Yukio ; Yoshikawa, Kuniyoshi
Author_Institution :
Toshiba Corp., Kawasaki, Japan
fDate :
2/1/1991 12:00:00 AM
Abstract :
Results obtained from a study on thin interpoly dielectrics, especially for nonvolatile memories with stacked-gate structures, are presented. First, the key factors which dominate the leakage current in polyoxide are reviewed, and intrinsic limitations in thinner polyoxide for device applications are investigated considering defect densities and edge leakage current. Second, the ONO (oxide/nitride/oxide) structure which overcomes polyoxide-thinning limitations is described. This stacked film reveals superior electric-field strength due to the inherent electron-trapping-assisted process. UV erase characteristics for EPROM cells with ONO structure are discussed. The slower erasing speed for EPROM cells with ONO interpoly dielectric is due to the decrease in photocurrent flow from a floating gate to a control gate
Keywords :
CVD coatings; EPROM; MOS integrated circuits; dielectric thin films; integrated circuit technology; integrated memory circuits; leakage currents; oxidation; EPROM cells; LPCVD; ONO interpoly dielectric; Si capacitors; SiOx-SiN-SiOx; SiOx-SiOx; UV erase characteristics; control gate; defect densities; dielectric breakdown; edge leakage current; electric-field strength; electron-trapping-assisted process; erasing speed; floating gate; nonvolatile memory devices; oxidation; oxide-nitride-oxide structure; photocurrent flow; polyoxide-thinning limitations; stacked film; stacked-gate structures; Capacitors; Dielectric devices; Dielectric substrates; Dielectric thin films; EPROM; Leakage current; Nonvolatile memory; Oxidation; Photoconductivity; Physics;
Journal_Title :
Electron Devices, IEEE Transactions on
