DocumentCode :
1401044
Title :
A simulation-based method for generating tests for sequential circuits
Author :
Cheng, Kwang-Ting ; Agrawal, Vishwani D. ; Kuh, Ernest S.
Author_Institution :
AT&T Bell Lab., Murray Hill, NJ, USA
Volume :
39
Issue :
12
fYear :
1990
fDate :
12/1/1990 12:00:00 AM
Firstpage :
1456
Lastpage :
1463
Abstract :
In a recent work of the authors (1987), a simulation-based directed search approach for generating test vectors for combinational circuits was proposed. In this method, the search for a test vector is guided by a cost function computed by the simulator. Event-driven simulation deals with circuit delays in a very natural manner. Signal controllability information required for the cost function is incorporated in a new form of logic model called the threshold-value model. These concepts are extended to meet the needs of sequential circuit test generation. Such extensions include handling of unknown values, analysis of feedback loops, and analysis of race conditions in the threshold-value model. A threshold-value sequential test generation program, TVSET, is implemented. It automatically initializes the circuit and generates race-free tests for synchronous and asynchronous circuits
Keywords :
combinatorial circuits; logic testing; sequential circuits; TVSET; asynchronous circuits; combinational circuits; generating tests; logic model; race-free tests; sequential circuits; simulation-based method; synchronous circuits; threshold-value model; Circuit simulation; Circuit testing; Combinational circuits; Computational modeling; Controllability; Cost function; Delay; Discrete event simulation; Logic; Sequential analysis;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/12.61065
Filename :
61065
Link To Document :
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