Modeling and characterization of gate oxide reliability

Author

Lee, Jack C. ; Chen, Ih-Chin ; Hu Chenming

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA

Volume

35

Issue

12

fYear

1988

fDate

12/1/1988 12:00:00 AM

Firstpage

2268

Lastpage

2278

Abstract

A technique of predicting the lifetime of an oxide to different voltages, different oxide areas, and different temperatures is presented. Using the defect density model in which defects are modeled as effective oxide thinning, many reliability parameters such as yield, failure rate, and screen time/screen yield can be predicted. This modeling procedure is applicable to both wafer-level and long-term reliability tests. Process improvements including defect gettering and alternative dielectrics such as chemical-vapor-deposited oxides are evaluated in the format of defect density as a function of effective oxide thinning

Keywords

chemical vapour deposition; electric breakdown of solids; failure analysis; field effect integrated circuits; getters; insulated gate field effect transistors; life testing; metal-insulator-semiconductor devices; oxidation; reliability; silicon compounds; CVD oxides; TDDB; alternative dielectrics; characterization of gate oxide reliability; chemical-vapor-deposited oxides; defect density model; defect gettering; different oxide areas; different temperatures; different voltages; effective oxide thinning; failure rate; lifetime prediction; long-term reliability tests; modeling procedure; process improvements; reliability parameters; screen time; screen yield; statistical modelling; wafer level reliability tests; yield; Dielectrics; Electric breakdown; Extrapolation; Gettering; Integrated circuit reliability; Predictive models; Semiconductor device modeling; Stress; Temperature; Voltage;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.8802

Filename

8802