DocumentCode
1402100
Title
Enhanced Scaling-Free CORDIC
Author
Jaime, Francisco J. ; Sánchez, Miguel A. ; Hormigo, Javier ; Villalba, Julio ; Zapata, Emilio L.
Author_Institution
Dept. of Comput. Archit., Univ. of Malaga, Málaga, Spain
Volume
57
Issue
7
fYear
2010
fDate
7/1/2010 12:00:00 AM
Firstpage
1654
Lastpage
1662
Abstract
Coordinate Rotation DIgital Computer (CORDIC) rotator is a well known and widely used algorithm within computers due to its way of carrying out some calculations such as trigonometric functions, among others. A scale factor compensation inherent to the CORDIC algorithm becomes an important drawback when trying to improve its benefits, although some authors have come up with a new scaling-free version, which has been successfully implemented within wireless applications. However, this new CORDIC can still be significantly improved by modifying some of its parts, therefore, this paper shows an enhanced version of the scaling-free CORDIC. These new enhancements have been implemented and tested, obtaining some new architectures which are able to reach a 35% lower latency and a 36% reduction in area and power consumption compared to the original scaling-free architecture.
Keywords
digital arithmetic; mathematical analysis; coordinate rotation digital computer; scaling free CORDIC enhancement; trigonometric functions; Booth recoding; Coordinate Rotation DIgital Computer (CORDIC); convergence range; scaling-free; vector rotation;
fLanguage
English
Journal_Title
Circuits and Systems I: Regular Papers, IEEE Transactions on
Publisher
ieee
ISSN
1549-8328
Type
jour
DOI
10.1109/TCSI.2009.2037391
Filename
5405041
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