Title :
A 0.01–8-GHz (12.5 Gb/s) 4
4 CMOS Switch Matrix
Author :
Shin, Donghyup ; Kang, Dong-Woo ; Rebeiz, Gabriel M.
Author_Institution :
Electr. & Comput. Eng. Dept., Univ. of California, San Diego, CA, USA
Abstract :
This paper presents a 0.01-8-GHz 4×4 switch matrix in 0.13-μm CMOS technology. A deep n-well series-shunt-series switch is chosen as the switching core, and the transistor sizes are optimized for low insertion loss and high isolation up to 8 GHz. Full electromagnetic analysis is also performed on the switching core to result in a compact design. The 4×4 switch matrix shows a measured insertion loss of 2.0-3.3 dB and an isolation of 50-44 dB at 2-8 GHz with near-zero power consumption. The measured input P1 dB and IP3 are 8-10 and 26-30 dBm at 0.5-8 GHz. The switch matrix has very low dispersion with <; 6-ps group-delay variation and can switch a 12.5-Gb/s signal with a bit error rate of <; 10-12. The design can be used in reconfigurable 0.01-8 GHz communication systems or as a crossbar switch matrix for data routing.
Keywords :
CMOS integrated circuits; error statistics; matrix algebra; microwave switches; microwave transistors; reconfigurable architectures; CMOS switch matrix; CMOS technology; bit error rate; bit rate 12.5 Gbit/s; crossbar switch matrix; data routing; deep n-well series-shunt-series switch; electromagnetic analysis; frequency 0.01 GHz to 8 GHz; frequency 2 GHz to 8 GHz; group-delay variation; high isolation; insertion loss; loss 2.0 dB to 3.3 dB; near-zero power consumption; reconfigurable communication systems; size 0.13 mum; switching core; transistor sizes; CMOS integrated circuits; Insertion loss; Switches; Switching circuits; Transistors; Transmission line matrix methods; Transmission line measurements; CMOS; crosspoint switch; microwave integrated circuits; reconfigurable architectuire; switch matrix;
Journal_Title :
Microwave Theory and Techniques, IEEE Transactions on
DOI :
10.1109/TMTT.2011.2176501