Title :
Circuit techniques in a 266-MHz MMX-enabled processor
Author :
Draper, Don ; Crowley, Matt ; Holst, John ; Favor, Greg ; Schoy, Albrecht ; Trull, Jeff ; Ben-Meir, Amos ; Khanna, Rajesh ; Wendell, Dennis ; Krishna, Ravi ; Nolan, Joe ; Mallick, Dhiraj ; Partovi, Hamid ; Roberts, Mark ; Johnson, Mark ; Lee, Thomas
Author_Institution :
Adv. Micro Devices Inc., Sunnyvale, CA, USA
fDate :
11/1/1997 12:00:00 AM
Abstract :
The AMD-K6 MMX-enabled processor is plug-compatible with the industry-standard Socket 7 and is binary compatible with the existing base of legacy X86 software. The microarchitecture is based on an out-of-order, superscalar execution engine using speculative execution. High performance and compact die size are achieved by using self-resetting, self-timed and pulsed-latch circuit design techniques in custom blocks and placed-and-routed blocks of standard cells. The 162 sq. mm die is fabricated on a 0.35-μm, five-layer metal process with local interconnect. It is assembled into a ceramic pin grid array (PGA) using C4 flip-chip mounting. The processor functions at clock speeds up to 266 MHz
Keywords :
CMOS digital integrated circuits; cache storage; circuit CAD; computer architecture; digital phase locked loops; high level synthesis; integrated circuit design; logic design; microprocessor chips; timing; 0.35 micron; 266 MHz; AMD-K6; C4 flip-chip mounting; CMOS microprocessor; MMX-enabled processor; cache implementation; ceramic PGA; ceramic pin grid array; custom blocks; five-layer metal process; local interconnect; microarchitecture; placed/routed blocks; pulsed-latch circuit design techniques; self-resetting; self-timed circuit techniques; speculative execution; standard cells; superscalar execution engine; Assembly; Circuit synthesis; Computer industry; Electronics packaging; Engines; Integrated circuit interconnections; Microarchitecture; Out of order; Pulse circuits; Sockets;
Journal_Title :
Solid-State Circuits, IEEE Journal of
