A 1-V 46-ns 16-Mb SOI-DRAM with body control technique

Author

Shimomura, Ken´ichi ; Shimano, Hiroki ; Sakashita, Narumi ; Okuda, Fumihiro ; Oashi, Toshiyuki ; Yamaguchi, Yasuo ; Eimori, Takahisa ; Inuishi, Masahide ; Arimoto, Kazutami ; Maegawa, Shigeto ; Inoue, Yasuo ; Komori, Shinji ; Kyuma, Kazuo

Author_Institution

Adv. Technol. R&D Center, Mitsubishi Electr. Corp., Hyogo, Japan

Volume

32

Issue

11

fYear

1997

fDate

11/1/1997 12:00:00 AM

Firstpage

1712

Lastpage

1720

Abstract

A low-voltage high-speed 16-Mb SOI-DRAM has been developed using a 0.5-μm CMOS/SIMOX technology. A newly introduced “FD-PD mode switching” transistor dynamically switches its operation mode between fully depleted (FD) and partially depleted (PD) according to the body bias voltage, thus it has both PD-mode large current drivability and FD-mode small leakage current. By the body bias control, the transistor operates as if it has an S-factor of 30 mV/decade. Enabling both high speed and low power at a low voltage, 30 mV is only one-half the theoretical value. By utilizing the transistor, we have developed body pulsed sense amplifier (BPS), body driven equalizer (BDEQ), body current clamper (BCC), and body pulsed transistor logic (BPTL) to achieve 46 ns access time at 1 V power supply with suppressed standby current

Keywords

CMOS memory circuits; DRAM chips; SIMOX; 0.5 micron; 1 V; 16 Mbit; 46 ns; CMOS/SIMOX technology; FD-PD mode switching transistor; S-factor; body control; body current clamper; body driven equalizer; body pulsed sense amplifier; body pulsed transistor logic; current drivability; fully depleted mode; leakage current; low-voltage high-speed SOI-DRAM; partially depleted mode; CMOS technology; Emergency power supplies; Equalizers; Leakage current; Logic; Low voltage; Power amplifiers; Pulse amplifiers; Pulsed power supplies; Switches;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.641691

Filename

641691