DocumentCode :
1402347
Title :
I.McIC: a single-chip MPEG-2 video encoder for storage
Author :
van der Werf, Albert ; Brüls, Fons ; Kleihorst, Richard P. ; Waterlander, Erwin ; Verstraelen, Math J W ; Friedrich, Thomas
Author_Institution :
Philips Res. Lab., Eindhoven, Netherlands
Volume :
32
Issue :
11
fYear :
1997
fDate :
11/1/1997 12:00:00 AM
Firstpage :
1817
Lastpage :
1823
Abstract :
I.McIC is a single-chip MPEG-2 video encoder for consumer storage applications. It supports both intra- and inter-coding mode to achieve bit rates from 5-15 Mb/s. It contains a recursive motion estimator, a programmable buffer/bit-rate controller, and a temporal noise-reduction stage. The resulting IC has 4.5×106 transistors and measures 192 mm2 in a 0.5-μm process. I.McIC was designed using mainly high-level synthesis tools. High-throughput fixed MPEG functions are performed by dedicated hardware. The remainder is performed in software by an embedded application-specific instruction-set processor with downloadable microcode to suit the IC for different applications of video coding
Keywords :
VLSI; application specific integrated circuits; consumer electronics; data compression; high level synthesis; integrated circuit noise; motion estimation; video coding; 0.5 micron; 5 to 15 Mbit/s; I.McIC single-chip MPEG-2 video encoder; bit rates; consumer storage applications; dedicated hardware; embedded application-specific instruction-set processor; fixed MPEG functions; high-level synthesis tools; inter-coding mode; intra-coding mode; programmable buffer/bit-rate controller; recursive motion estimator; temporal noise-reduction stage; Bit rate; Embedded software; Hardware; High level synthesis; Integrated circuit noise; Motion control; Motion estimation; Process design; Recursive estimation; Software performance;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.641706
Filename :
641706
Link To Document :
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