DocumentCode :
1402580
Title :
A 40 Gs/s Time Interleaved ADC Using SiGe BiCMOS Technology
Author :
Chu, Michael ; Jacob, Philip ; Kim, Jin-Woo ; LeRoy, Mitchell R. ; Kraft, Russell P. ; McDonald, John F.
Author_Institution :
Center for Integrated Electron., Rensselaer Polytech. Inst., Troy, NY, USA
Volume :
45
Issue :
2
fYear :
2010
Firstpage :
380
Lastpage :
390
Abstract :
The search for high speed, high bandwidth A/D converters is ongoing, and techniques to push the envelope are constantly being developed. In this paper an open loop, scalable, time-interleaved ADC architecture is presented, as well as a 60 GHz Colpitts oscillator. With the use of double-sampling, the timing skew requirements between channels is greatly relaxed, allowing sampling rates of up to 40 Gs/s at 4-bits of accuracy. This circuit is implemented using the IBM 8HP SiGe technology, with fT of 210 GHz. The performance of the 8HP ADC is validated by measurement. In addition, simulations with an experimental 8XP transistor model provided by IBM with a 350 GHz fT suggest that 30% more circuit speed is possible by just swapping the transistors.
Keywords :
BiCMOS digital integrated circuits; Ge-Si alloys; analogue-digital conversion; millimetre wave oscillators; semiconductor materials; timing; 8XP transistor model; BiCMOS technology; Colpitt oscillator; IBM 8HP technology; SiGe; frequency 210 GHz; frequency 350 GHz; frequency 60 GHz; high-bandwidth A/D converters; sampling rates; time interleaved ADC architecture; timing skew requirements; transistor swapping; Associate members; BiCMOS integrated circuits; Clocks; Germanium silicon alloys; Interleaved codes; Jacobian matrices; Oscilloscopes; Sampling methods; Silicon germanium; Software radio; ADC; BiCMOS; SiGe; converter; flash; interleaved;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2009.2039375
Filename :
5405144
Link To Document :
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