Title :
Accumulator-synthesizer with error-compensation
Author :
Meyer-Bäse, U. ; Wolf, S. ; Taylor, F.
Author_Institution :
High Speed Digital Archit. Lab., Florida Univ., Gainesville, FL, USA
fDate :
7/1/1998 12:00:00 AM
Abstract :
A detailed analysis of the error behaviour of an accumulator-based frequency synthesizer is presented. It is shown that with some additional components, a reduction in error by a factor of 60 can be achieved
Keywords :
error compensation; frequency synthesizers; phase locked loops; PLL; accumulator-based frequency synthesizer; compensation; error behaviour; error reduction; Error analysis; Feedback; Frequency conversion; Frequency locked loops; Frequency synthesizers; Low pass filters; Phase locked loops; Signal synthesis; Stability; Voltage-controlled oscillators;
Journal_Title :
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
