Title :
Carrier Lifetime Engineering for Floating-Body Cell Memory
Author :
Kim, Sungho ; Choi, Sung-Jin ; Moon, Dong-Il ; Choi, Yang-Kyu
Author_Institution :
Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea
Abstract :
A novel bias scheme is demonstrated for performance improvement of floating-body cell memory, particularly retention time. Its basic mechanism is based on carrier lifetime engineering, which takes advantage of generation lifetime that is longer than recombination lifetime. In addition, the proposed scheme is suitable for low-power operation; a high drain bias is unnecessary to generate excess carriers, which allows reliable endurance of up to 1012 switching instances at 85 °C.
Keywords :
DRAM chips; carrier lifetime; silicon-on-insulator; carrier lifetime engineering; floating body cell memory; generation lifetime; high drain bias; low power operation; performance improvement; Charge carrier lifetime; Logic gates; Materials; Reliability; Sensors; Steady-state; Time measurement; 1T-DRAM; Carrier lifetime; double gate; finFET; floating-body cell (FBC); silicon-on-insulator (SOI) metal–oxide–semiconductor field-effect transistor (MOSFET);
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2011.2176944
