A Novel Capacitorless DRAM Cell Using Superlattice Bandgap-Engineered (SBE) Structure With 30-nm Channel Length

Author

Lee, Sunyeong ; Shin, Ja Sun ; Jang, Jaeman ; Bae, Hagyoul ; Yun, Daeyoun ; Lee, Jieun ; Kim, Dae Hwan ; Kim, Dong Myong

Author_Institution

Sch. of Electr. Eng., Kookmin Univ., Seoul, South Korea

Volume

10

Issue

5

fYear

2011

Firstpage

1023

Lastpage

1030

Abstract

We propose a novel SiGe superlattice bandgap-engineered (SBE) capacitorless dynamic random access memory (DRAM) cell with 30-nm channel length as a next-generation DRAM cell with high storage density and long retention time for practical implementation by 2-D technology computer-aided design simulation. The SBE capacitorless DRAM cell uses a common source structure and different metal layers for the top gate word line (WL) from the bottom gate WL to realize a 6F² feature size. Thanks to the Si_0.8Ge_0.2 superlattice quantum well and silicon dioxide (SiO₂) physical barrier, we obtained 213 μA/μm for the sensing margin and about 10 ms for the retention time.

Keywords

DRAM chips; Ge-Si alloys; energy gap; quantum well devices; semiconductor quantum wells; semiconductor storage; semiconductor superlattices; silicon compounds; technology CAD (electronics); 2D technology computer-aided design simulation; capacitorless DRAM cell; dynamic random access memory cell; next-generation DRAM cell; silicon dioxide physical barrier; size 30 nm; storage density; superlattice bandgap-engineered structure; superlattice quantum well; Logic gates; Photonic band gap; Random access memory; Sensors; Silicon; Silicon germanium; Superlattices; 2-D TCAD; capacitorless dynamic random access memory (DRAM); retention; sensing margin; silicon dioxide (SiO$_2$) physical barrier; superlattice;

fLanguage

English

Journal_Title

Nanotechnology, IEEE Transactions on

Publisher

ieee

ISSN

1536-125X

Type

jour

DOI

10.1109/TNANO.2010.2098885

Filename

5667061