• DocumentCode
    1403419
  • Title

    Verifying IEC 61499 Function Blocks Using Esterel

  • Author

    Yoong, Li Hsien ; Roop, Partha S.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of Auckland, Auckland, New Zealand
  • Volume
    2
  • Issue
    1
  • fYear
    2010
  • fDate
    3/1/2010 12:00:00 AM
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    IEC 61499 is an international standard that prescribes the use of function blocks for designing industrial-process control systems. Function blocks enable control software to be developed using an intuitive standard´s-based graphical framework. The standard, however, lacks the semantic rigour necessary for automated verification of function block programs. Several approaches to fill this lacuna have been proposed, but these have so far focused on the verification of control properties by abstracting data from the program. This letter builds on a recent proposal to translate function blocks to Esterel in order to use the verification tools for Esterel to verify both control and data properties of function block programs. The key extensions to this translation are described herein, and have been implemented in a prototype tool. The viability of this approach is illustrated through several examples using this prototype. This demonstrates how a language with rigorous semantics and associated tools, like Esterel, can be advantageously combined with graphical notations familiar to industrial engineers to produce reliable control software.
  • Keywords
    IEC standards; process control; program verification; Esterel; IEC 61499 function blocks verification; industrial-process control systems; Esterel; IEC 61499; function blocks; verification;
  • fLanguage
    English
  • Journal_Title
    Embedded Systems Letters, IEEE
  • Publisher
    ieee
  • ISSN
    1943-0663
  • Type

    jour

  • DOI
    10.1109/LES.2010.2042275
  • Filename
    5406071