Title :
A 1-V heterogeneous reconfigurable DSP IC for wireless baseband digital signal processing
Author :
Zhang, Hui ; Prabhu, Vandana ; George, Varghese ; Wan, Marlene ; Benes, Martin ; Abnous, Arthur ; Rabaey, Jan M.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
Abstract :
A heterogeneous reconfigurable platform enables the flexible implementation of baseband wireless functions at energy levels between 10 and 100 MOPS/mW, six times higher than traditional digital signal processors. A 5.2 mm/spl times/6.7 mm prototype processor, targeted for voice compression, is implemented in a 0.25-/spl mu/m 6-metal CMOS process, and consumes 1.8 mW at an average operation rate of 40 MHz. It combines an embedded microprocessor with an array of computational units of different granularities, connected by a hierarchical reconfigurable interconnect network.
Keywords :
CMOS digital integrated circuits; data compression; digital signal processing chips; low-power electronics; reconfigurable architectures; satellite communication; speech coding; 0.25 micron; 1 V; 1.8 mW; 40 MHz; CMOS IC; DSP; Pleiades; embedded microprocessor; hierarchical reconfigurable interconnect network; low-voltage circuit; voice compression; wireless baseband digital signal processing; Baseband; Computer architecture; Digital integrated circuits; Digital signal processing; Digital signal processors; Energy efficiency; Field programmable gate arrays; Microprocessors; Reconfigurable architectures; Signal processing algorithms;
Journal_Title :
Solid-State Circuits, IEEE Journal of
