A low-power integrated circuit for remote speech recognition

Author

Borgatti, Michele ; Felici, Marco ; Ferrari, Alberto ; Guerrieri, Roberto

Author_Institution

Dipt. di Elettronica Inf. e Sistemistica, Bologna Univ., Italy

Volume

33

Issue

7

fYear

1998

fDate

7/1/1998 12:00:00 AM

Firstpage

1082

Lastpage

1089

Abstract

In this paper, a low-power, low-voltage speech processing system is presented. The system is intended to he used in remote speech recognition applications where feature extraction is performed on terminal and high-complexity recognition tasks and moved to a remote server accessed through a radio link. The proposed system is based on a CMOS feature extraction chip for speech recognition that computes 15 cepstrum parameters, each 8 ms, and dissipates 30 μW at 0.9-V supply. Single-cell battery operation is achieved. Processing relies on a novel feature extraction algorithm using 1-bit A/D conversion of the input speech signal. The chip has been implemented as a gate array in a standard 0.5-μm, three-metal CMOS technology. The average energy required to process a single word of the TI46 speech corpus is 10 μJ. It achieves recognition rates over 98% in isolated-word speech recognition tasks

Keywords

CMOS integrated circuits; analogue-digital conversion; cepstral analysis; feature extraction; speech recognition; 0.5 micron; 0.9 V; 30 muW; 8 ms; A/D conversion; CMOS feature extraction chip; cepstrum parameters; feature extraction; gate array; high-complexity recognition; isolated-word speech recognition; low-power integrated circuit; low-voltage speech processing system; recognition rates; remote speech recognition; Base stations; CMOS technology; Circuits; Digital signal processing; Energy consumption; Feature extraction; Quantization; Signal processing algorithms; Speech processing; Speech recognition;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.701266

Filename

701266