DocumentCode
1404723
Title
A simulation study of long throw sputtering for diffusion barrier deposition into high aspect vias and contacts
Author
Smy, Tom ; Tan, Liang ; Chan, K. ; Tait, R.N. ; Broughton, James N. ; Dew, Steven K. ; Brett, Michael J.
Author_Institution
Dept. of Electron., Carleton Univ., Ottawa, Ont., Canada
Volume
45
Issue
7
fYear
1998
fDate
7/1/1998 12:00:00 AM
Firstpage
1414
Lastpage
1425
Abstract
Modified sputtering techniques, such as long throw sputtering, collimation, and ionized sputtering, have been proposed to improve VLSI topography bottom coverage by narrowing the angular distribution of the sputter flux at the substrate and reducing subsequent flux shadowing at the bottom of topography. This paper first investigates a number of unique aspects involved in the simulation of long throw sputter systems. In particular, time importance of inhomogeneous film density and nonunity sticking coefficients are addressed. The second part of the paper presents a simulation study of long throw sputtering, providing a comparison to collimated and standard sputtering systems. The simulations are performed using the SIMSPUD/SIMBAD ballistic deposition tool. SIMSPUD is used to study film uniformity over a 300-mm wafer and to generate angular distributions at the center and edge of the wafer. The ability of SIMBAD to simulate directed sputtering systems is verified by direct comparison to Ti films deposited into oxide trenches. The importance of modeling the film microstructure is demonstrated by comparison between cross-sectional SEM´s micrograph for evaporation and modeling results, such as long throw sputtering with a variety of substrate/target spacings, typical “standard” as well as “collimated” systems. SEM´s of overhang structures and simulations are also presented to demonstrate nonunity sticking during the co-sputtering of TiW
Keywords
VLSI; diffusion barriers; integrated circuit metallisation; semiconductor process modelling; sputter deposition; 300 mm; SIMSPUD/SIMBAD ballistic deposition tool; Ti; TiW; VLSI topography bottom coverage; angular distribution; contact; cross-sectional SEM; diffusion barrier; flux shadowing; high aspect ratio structure; inhomogeneous film density; long throw sputtering; microstructure; oxide trench; simulation; sticking coefficient; via; Circuit simulation; Collimators; Microelectronics; Semiconductor device modeling; Semiconductor process modeling; Shadow mapping; Sputtering; Substrates; Surfaces; Very large scale integration;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/16.701470
Filename
701470
Link To Document