A low-power MPEG audio layer III decoder IC with an integrated digital-to-analog converter

Author

Takala, Janne ; Roström, Juha ; Vaaraniemi, Tuukka ; Herranen, Henrik ; Ojala, Pasi

Author_Institution

VLSI Solution Oy, Tampere, Finland

Volume

46

Issue

3

fYear

2000

fDate

8/1/2000 12:00:00 AM

Firstpage

896

Lastpage

902

Abstract

An MP3 decoder IC including a stereo DAC suitable for portable players is presented. The DAC uses digital interpolation to operate on a fixed output sample rate. The decoding software requires 17 MIPS on a 16-bit DSP core to decode a 44.1 kHz 128 kbit/s stereo bitstream. The IC has been manufactured in a 0.35 μm CMOS process. Depending on the bitstream, the 24 mm² IC consumes 40-50 mW

Keywords

CMOS digital integrated circuits; Hi-Fi equipment; VLSI; audio coding; code standards; decoding; digital signal processing chips; digital-analogue conversion; telecommunication standards; 0.35 mum; 128 kbit/s; 17 MIPS; 40 to 50 mW; 44.1 kHz; CMOS process; DSP core; MP3 decoder IC; MPEG audio layer III decoder IC; VLSI; VSDSP core; decoding software; digital interpolation; fixed output sample rate; headphone driver; integrated DAC; integrated digital-to-analog converter; low-power decoder IC; near-CD quality audio; portable audio players; sample rate converter; standardized audio compression method; stereo DAC; stereo bitstream; Consumer electronics; Decoding; Digital audio players; Digital integrated circuits; Digital signal processing; Digital-analog conversion; Flash memory; Phase locked loops; Solid state circuits; Vibrations;

fLanguage

English

Journal_Title

Consumer Electronics, IEEE Transactions on

Publisher

ieee

ISSN

0098-3063

Type

jour

DOI

10.1109/30.883469

Filename

883469