DocumentCode :
1405845
Title :
Elementary function generators for neural-network emulators
Author :
Vassiliadis, Stamatis ; Zhang, Ming ; Delgado-Frias, José G.
Author_Institution :
Dept. of Electr. Eng., Delft Univ. of Technol., Netherlands
Volume :
11
Issue :
6
fYear :
2000
fDate :
11/1/2000 12:00:00 AM
Firstpage :
1438
Lastpage :
1449
Abstract :
Piecewise first- and second-order approximations are employed to design commonly used elementary function generators for neural-network emulators. Three novel schemes are proposed for the first-order approximations. The first scheme requires one multiplication, one addition, and a 28-byte lookup table. The second scheme requires one addition, a 14-byte lookup table, and no multiplication. The third scheme needs a 16-byte lookup table, no multiplication, and no addition. A second-order approximation approach provides better function precision; it requires more hardware and involves the computation of one multiplication and two additions and access to a 28-byte lookup table. We consider bit serial implementations of the schemes to reduce the hardware cost. The maximum delay for the four schemes ranges from 24- to 32-bit serial machine cycles; the second-order approximation approach has the largest delay. The proposed approach can be applied to compute other elementary function with proper considerations.
Keywords :
function approximation; function generators; neural nets; table lookup; virtual machines; first-order approximation; function generators; lookup table; neural-network emulators; piecewise approximation; second-order approximation; square root; Computer networks; Costs; Delay; Guidelines; Hardware; Iterative methods; Polynomials; Power engineering computing; Signal generators; Table lookup;
fLanguage :
English
Journal_Title :
Neural Networks, IEEE Transactions on
Publisher :
ieee
ISSN :
1045-9227
Type :
jour
DOI :
10.1109/72.883475
Filename :
883475
Link To Document :
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