Floating-Body Diode—A Novel DRAM Device

Author

Avci, Uygar E. ; Kencke, David L. ; Chang, Peter L D

Author_Institution

Components Res., Technol. & Manuf. Group, Intel Corp., Hillsboro, OR, USA

Volume

33

Issue

2

fYear

2012

Firstpage

161

Lastpage

163

Abstract

A novel 8F² DRAM cell is introduced, consisting of two gates controlling a low-doped silicon-on-insulator channel and opposite-polarity source and drain. Simulation with models calibrated to experimental floating-body cell data confirms virtual thyristor memory operation and demonstrates 85°C retention time in excess of 10 ms in a scaled FinFET architecture. With unit cell area comparable to that of conventional DRAM, 1.6-V total operation range, 1-ns program time, and CMOS-compatible process, floating-body diode is a candidate for stand-alone or embedded memory applications at 15-nm node and beyond.

Keywords

CMOS integrated circuits; DRAM chips; MOSFET circuits; semiconductor diodes; silicon-on-insulator; CMOS; DRAM device; FinFET architecture; floating-body cell data; floating-body diode; opposite-polarity source and drain; silicon-on-insulator channel; size 15 nm; temperature 85 C; time 1 ns; time 10 ms; virtual thyristor memory; voltage 1.6 V; Computer architecture; FinFETs; Logic gates; Microprocessors; Random access memory; Silicon; Thyristors; DRAM; FinFET; floating body; floating-body cell (FBC); silicon-on-insulator (SOI);

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2011.2177239

Filename

6112172