DocumentCode :
1407538
Title :
Bound-Based Statistically-Critical Path Extraction Under Process Variations
Author :
Xie, Lin ; Davoodi, Azadeh
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Wisconsin, Madison, WI, USA
Volume :
30
Issue :
1
fYear :
2011
Firstpage :
59
Lastpage :
71
Abstract :
This paper introduces a bound-based approach to extract a pre-specified number of statistically-critical paths under process variations. These are the paths with the highest “violation probability,” which indicates the probability that a path would violate a given timing constraint. Our approach requires pre-computation of the violation probability of all the nodes and edges in the circuit timing graph, which can be done using two rounds of block-based statistical static timing analysis. Given these node/edge violation probabilities, we derive tight upper and lower bounds for any arbitrary segment of consecutive nodes and edges, which is the major contribution of this paper. We further utilize these bounds to extract the statistically-critical paths and show constant-time for incremental update of the bounds when extending a segment to a longer one. If our goal is to extract the single most statistically-critical path, we show a bound-based reduction that can prune a large portion of circuit without losing optimality. In our simulations, we verify the correctness and accuracy of our bounds for individual paths, and compare with exact path extraction using Monte-Carlo-based simulation, and an alternative which incorporates path-based statistical static timing analysis.
Keywords :
statistical analysis; timing; Monte-Carlo-based simulation; block-based statistical static timing analysis; bound-based statistically-critical path extraction; circuit timing graph; violation probability; Computational complexity; Delay; Logic gates; Probability; Upper bound; Process variations; statistical static timing analysis; statistically-critical paths; violation probability;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.2010.2072670
Filename :
5671544
Link To Document :
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