• DocumentCode
    1407676
  • Title

    Reduction of base-collector capacitance in InP/InGaAs HBT´s using a novel double polyimide planarization process

  • Author

    Hyunchol Shin ; Gaessler, C. ; Leier, H.

  • Author_Institution
    Res. Center, Daimler-Benz AG, Ulm, Germany
  • Volume
    19
  • Issue
    8
  • fYear
    1998
  • Firstpage
    297
  • Lastpage
    299
  • Abstract
    The parasitic base-collector capacitance (C/sub BC/) in InP/InGaAs heterojunction bipolar transistors (HBTs) has been reduced using a novel double polyimide planarization process which avoids damage of the extrinsic base layer. The extrinsic base metal outside the base-collector mesa is placed on the polyimide by polyimide coating and etch-back to the base layer. We obtained fT of 81 GHz and fmax of 103 GHz with a 2×10 μm emitter. Performance comparison between two devices with the same area of 2×2 μm but with different base-collector mesa area showed 56% reduction of C/sub BC/ and 35% increase of fT and fmax.
  • Keywords
    III-V semiconductors; capacitance; gallium arsenide; heterojunction bipolar transistors; indium compounds; polymer films; surface treatment; InP-InGaAs; InP/InGaAs heterojunction bipolar transistor; double polyimide planarization; parasitic base-collector capacitance; Gallium arsenide; Heterojunction bipolar transistors; Indium gallium arsenide; Indium phosphide; Ion implantation; Metallization; Parasitic capacitance; Planarization; Polyimides; Wet etching;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/55.704405
  • Filename
    704405