DocumentCode :
1408092
Title :
Pipelined CORDIC-based cascade orthogonal IIR digital filters
Author :
Ma, Jun ; Parhi, Keshab K. ; Deprettere, Ed F.
Author_Institution :
Dept. of Electr. & Comput. Eng., Minnesota Univ., Minneapolis, MN, USA
Volume :
47
Issue :
11
fYear :
2000
fDate :
11/1/2000 12:00:00 AM
Firstpage :
1238
Lastpage :
1253
Abstract :
CORDIC-based cascade orthogonal infinite-impulse response (IIR) digital filters possess desirable properties for VLSI implementations such as local connection, regularity, absence of limit cycle and overflow oscillations, and good finite word-length behavior. However, the achievable sample rate of these filters is limited, since these structures cannot be pipelined at finer levels (such as bit or multi-bit level) due to the presence of feedback loops. In this paper, we present a novel approach to design pipelined CORDIC-based cascade orthogonal IIR digital filters using the transfer function approach. We first present a systematic way to synthesize cascade orthogonal IIR digital filters using scalar lossless inverse scattering theory, and realize the filter transfer function as a cascade inter-connection of orthogonal sections where each section implements one real zero or a pair of complex conjugate zeroes of the transfer function. In this way, the filter achieves low sensitivity over the entire filter spectrum. Novel pipelining techniques for both coarse-grain and fine-grain pipelining of these filters are then proposed. In coarse-grain pipelining, we present a novel method based on retiming and orthogonal matrix decomposition techniques which can increase the maximum filter sample rate to O(1) level which is independent of the filter order. In fine-grain pipelining, we present a novel method based on constraint filter design and polyphase decomposition techniques which could increase the maximum filter sample rate to any desired level. The proposed architecture for coarse-grain pipelining consists of only Givens rotations, and the one for fine-grain pipelining consists of only Givens rotations and a few additions. Both architectures can be realized using CORDIC arithmetic-based processors. Finally, finite word-length simulations are carried out to compare the performance of different topologies.
Keywords :
IIR filters; VLSI; cascade networks; circuit feedback; digital filters; pipeline arithmetic; transfer functions; CORDIC-based systems; Givens rotations; VLSI implementations; achievable sample rate; arithmetic-based processors; cascade circuits; coarse-grain pipelining; complex conjugate zeroes; constraint filter design; feedback loops; filter sample rate; filter spectrum; fine-grain pipelining; finite word-length behavior; finite word-length simulations; local connection; orthogonal IIR digital filters; orthogonal matrix decomposition; pipelined filters; polyphase decomposition techniques; regularity; retiming; scalar lossless inverse scattering theory; transfer function approach; Digital filters; Feedback loop; Filtering theory; Finite wordlength effects; IIR filters; Inverse problems; Limit-cycles; Pipeline processing; Transfer functions; Very large scale integration;
fLanguage :
English
Journal_Title :
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
Publisher :
ieee
ISSN :
1057-7130
Type :
jour
DOI :
10.1109/82.885131
Filename :
885131
Link To Document :
بازگشت