Title :
Oxidation-sharpened gated field emitter array process
Author :
McGruer, N.E. ; Warner, K. ; Singhal, P. ; Gu, J.J. ; Chan, Chung
Author_Institution :
Dept. of Electr. & Comput. Eng., Northeastern Univ., Boston, MA, USA
fDate :
10/1/1991 12:00:00 AM
Abstract :
Structural and electrical characteristics of silicon field emitter arrays are reported. The authors present a process using anisotropic etching of silicon, and silicon oxidation, to form self-aligned gated field emitter structures. The process uses plasma etching and oxidation to form the field emission tips, and allows control of the aspect ratio of the devices. Processing limits and process latitude are discussed. The authors observed average currents of 0.3 μA/emitter in 1300-emitter arrays, and the emission is stable at 5×10-8 torr. The arrays exhibit a soft failure behavior, where individual emission tips fail as the gate voltage is increased, but the array as a whole continues to operate
Keywords :
cathodes; electron field emission; oxidation; silicon; vacuum microelectronics; 0.3 muA; 5 to 10-8 torr; Si; anisotropic etching; aspect ratio; average currents; electrical characteristics; field emission cathodes; field emission tips; gate voltage; gated field emitter array process; individual emission tips fail; oxidation; oxidation sharpened emitters; plasma etching; plasma oxidation; process latitude; processing limits; self-aligned gated field emitter structures; soft failure behavior; structural characteristics; Anisotropic magnetoresistance; Electric variables; Etching; Field emitter arrays; Oxidation; Plasma applications; Plasma devices; Plasma materials processing; Plasma properties; Silicon;
Journal_Title :
Electron Devices, IEEE Transactions on
