A technique for fast calculation of capacitance matrices of interconnect structures

A finite difference (FD) method for rapid and accurate evaluation of capacitance matrices of interconnect configurations is described in this paper. The method utilizes newly-developed perfectly matching layer (PML) technique for mesh truncation, specially adapted to the static case in conjunction with a mixed boundary condition, referred to as the α-technique. The application of proposed approach to the modeling of complex structures, comprising multiple metal layers, cross-overs, vias, and bends embedded in a layered dielectric medium, is illustrated in the paper. The paper also shows the usefulness of the technique to the problem of mapping within the interconnect. A novel approach for efficient truncation of a class of large interconnects called the wraparound scheme, is introduced in the paper. Several numerical examples that illustrate the efficiency and flexibility of the approaches, described above, are included in the paper