DocumentCode :
1409024
Title :
Distributed interleaving of paralleled power converters
Author :
Perreault, David J. ; Kassakian, John G.
Author_Institution :
Lab. for Electromagn. & Electron. Syst., MIT, Cambridge, MA, USA
Volume :
44
Issue :
8
fYear :
1997
fDate :
8/1/1997 12:00:00 AM
Firstpage :
728
Lastpage :
734
Abstract :
This paper introduces a distributed approach to interleaving paralleled power converter cells. Unlike conventional methods, the distributed approach requires no centralized control, automatically accommodates varying numbers of converter cells, and is highly tolerant of subsystem failures. A general methodology for achieving distributed interleaving is proposed, along with a specific implementation approach. The design and experimental verification of a 50 kHz prototype system is presented, and quantitative performance comparisons are made between synchronized clocking, independent clocking, and interleaved clocking of the converter cells. The experimental results corroborate the analytical predictions and demonstrate the tremendous benefits of the distributed interleaving approach
Keywords :
clocks; parallel architectures; power convertors; 50 kHz; cellular architecture; converter cells; distributed interleaving; independent clocking; paralleled power converters; subsystem failures; synchronized clocking; Aggregates; Centralized control; Clocks; Frequency synchronization; Interleaved codes; Prototypes; Stochastic processes; Switching converters; Switching frequency; System performance;
fLanguage :
English
Journal_Title :
Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on
Publisher :
ieee
ISSN :
1057-7122
Type :
jour
DOI :
10.1109/81.611269
Filename :
611269
Link To Document :
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