DocumentCode :
1409339
Title :
High-performance CMOS buffered gate modulation input (BGMI) readout circuits for IR FPA
Author :
Hsieh, Chih-Cheng ; Wu, Chung-Yu ; Sun, Tai-Ping ; Jih, Far-Wen ; Cherng, Ya-Tung
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Volume :
33
Issue :
8
fYear :
1998
fDate :
8/1/1998 12:00:00 AM
Firstpage :
1188
Lastpage :
1198
Abstract :
A new CMOS current readout structure for the infrared (IR) focal-plane-array (FPA), called the buffered gate modulation input (BGMI) circuit, is proposed in this paper. Using the technique of unbalanced current mirror, the new BGMI circuit can achieve high charge sensitivity with adaptive current gain control and good immunity from threshold-voltage variations. Moreover, the readout dynamic range can be significantly increased by using the threshold-voltage-independent current-mode background suppression technique. To further improve the readout performance, switch current integration techniques, shared-buffer biasing technique, and dynamic charging output stage with the correlated double sampling circuit are also incorporated into the BGMI circuit. An experimental 128×128 BGMI readout chip has been designed and fabricated in 0.8 μm double-poly-double-metal (DPDM) n-well CMOS technology. The measurement results of the fabricated readout chip under 77 K and 5 V supply voltage have successfully verified both readout function and performance improvement. The fabricated chip has the maximum charge capacity of 9.5×107 electrons, the transimpedance of 2.5×109 Ω at 10 nA background current, and the arrive power dissipation of 40 mW. The uniformity of background suppression currents can be as high as 99%. Thus, high injection efficiency, high charge sensitivity, large dynamic range, large storage capacity, and low noise can be achieved In the BGMI circuit with the pixel size of 50×50 μm2. These advantageous characteristics make the BCMI circuit suitable for various IR FPA readout applications with a wide range of background currents
Keywords :
CMOS integrated circuits; buffer circuits; focal planes; 0.8 micron; 40 mW; 5 V; 77 K; BGMI readout circuit; CMOS buffered gate modulation input readout circuit; IR FPA; adaptive current gain control; charge capacity; charge sensitivity; correlated double sampling circuit; current mirror; double-poly-double-metal n-well CMOS technology; dynamic charging output stage; dynamic range; fixed pattern noise; infrared focal plane array; injection efficiency; power dissipation; shared buffer biasing; storage capacity; switch current integration; threshold-voltage-independent current-mode background suppression; transimpedance; Adaptive control; CMOS technology; Dynamic range; Gain control; Mirrors; Programmable control; Sampling methods; Semiconductor device measurement; Switches; Switching circuits;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.705357
Filename :
705357
Link To Document :
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