DocumentCode
1409446
Title
Scheduling of semiconductor test facility via Petri nets and hybrid heuristic search
Author
Xiong, Huanxin Henry ; Zhou, MengChu
Author_Institution
Lucent Technol., North Andover, MA, USA
Volume
11
Issue
3
fYear
1998
fDate
8/1/1998 12:00:00 AM
Firstpage
384
Lastpage
393
Abstract
This paper proposes and evaluates two Petri net-based hybrid heuristic search strategies and their applications to semiconductor test facility scheduling. To reduce the setup time, such as the time spent to bring the test facilities to the required temperatures, scheduling multiple lots for each job type together is desirable. Petri nets can concisely model multiple lot sizes for each job, the strict precedence constraints, multiple kinds of resources, concurrent activities and flexible routes. To cope with the complexities for multiple lots scheduling, this paper presents two Petri net-based hybrid heuristic search strategies. They combine the heuristic best-first strategy with the controlled back tracking strategy based on the execution of the Petri nets. The obtained scheduling results are compared and analyzed through a small-size test facility. The better algorithm is also applied to a more sizable facility containing types of resources with a total of 79 pieces and 30 jobs. The future work includes the real-time implementation of the proposed method and scheduling results in real industrial settings
Keywords
Petri nets; production control; search problems; semiconductor device testing; test facilities; Petri net; hybrid heuristic search; scheduling; semiconductor test facility; Integrated circuit modeling; Job shop scheduling; Optimal scheduling; Petri nets; Processor scheduling; Production; Semiconductor device testing; System testing; Temperature; Test facilities;
fLanguage
English
Journal_Title
Semiconductor Manufacturing, IEEE Transactions on
Publisher
ieee
ISSN
0894-6507
Type
jour
DOI
10.1109/66.705373
Filename
705373
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