DocumentCode :
1409513
Title :
Reduction of RIE-damage by N2O-anneal of thermal gate oxide
Author :
Joshi, Aniruddha B. ; Mann, Richard A. ; Chung, Lee ; Cho, T.H. ; Min, B.W. ; Kwong, D.L.
Author_Institution :
Dept. of Electr. & Comput. Eng., Rockwell Int. Corp., Newport Beach, CA, USA
Volume :
11
Issue :
3
fYear :
1998
fDate :
8/1/1998 12:00:00 AM
Firstpage :
495
Lastpage :
500
Abstract :
We have investigated RIE-induced damage in MOS devices with thermal oxide as well as N2O-annealed oxide as gate dielectrics. A systematic improvement in robustness against RIE-induced damage is seen when N2O flow rate and/or N2O anneal temperature are increased. We have demonstrated a N2O anneal process at 900°C, which provides a robust SiO2/Si interface against plasma damage and hot carrier stress
Keywords :
MOSFET; annealing; dielectric thin films; hot carriers; sputter etching; 900 degC; MOS devices; N2O; RIE-damage; Si-SiO2; anneal temperature; annealed oxide; flow rate; gate dielectrics; hot carrier stress; plasma damage; thermal gate oxide; Annealing; CMOS process; Dielectrics; Etching; Hot carriers; Implants; Plasma applications; Plasma temperature; Robustness; Thermal stresses;
fLanguage :
English
Journal_Title :
Semiconductor Manufacturing, IEEE Transactions on
Publisher :
ieee
ISSN :
0894-6507
Type :
jour
DOI :
10.1109/66.705384
Filename :
705384
Link To Document :
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