Algebraic test-pattern generation based on the Reed-Muller spectrum

In the last few years new test generation procedures based on Boolean techniques have been reported. Despite the fact that Boolean operations are in general computationally expensive and that procedures are available based on path-oriented methods of reasonable efficiency, there is still interest in developing new methods to speed up the detection of those faults that are hard to detect by the path-oriented methods, to reduce the test lengths obtained, or to make it possible to use parallel machines more efficiently. A new algebraic procedure to determine test patterns for stuck-line faults in combinational logic circuits is proposed. It is based on the use of Reed-Muller coefficients to build and solve the equation that describes the Boolean difference between the circuit affected by a given fault and the correct one. It is also shown how digital spectral techniques, which have been widely used in the synthesis of switching functions and in the determination of circuit signatures for built-in self testing, can also be applied to the test-pattern generation problem. The procedure has proved its efficiency when applied to the standard ISCAS benchmark circuits