• DocumentCode
    1411089
  • Title

    Guided Probabilistic Checksums for Error Control in Low-Power Digital Filters

  • Author

    Nisar, Mudassar M. ; Chatterjee, Abhijit

  • Author_Institution
    Intel Corp., Hillsboro, OR, USA
  • Volume
    60
  • Issue
    9
  • fYear
    2011
  • Firstpage
    1313
  • Lastpage
    1326
  • Abstract
    In many DSP applications (image and voice processing), several dBs of SNR loss can be tolerated without noticeable impact on application level performance. For power optimization in such applications, voltage overscaling (VOS) can be used to operate the arithmetic circuitry at or marginally below the critical circuit path delay while incurring tolerable SNR loss due to the resulting periodic errors in computation. In this paper, low cost checksum codes are used for detection and compensation of intermittent errors due to voltage overscaling in linear digital filters. In traditional coding theory, diagnosis of errors is a key problem and incurs significant computation and latency cost. In the proposed approach, low-precision shadow latches are used to identify likely sources of errors due to voltage overscaling to avoid error diagnosis. This allows accurate error compensation with distance-2 checksum codes that are normally good only for error detection but not for correction. Very precise compensation is achieved by distributing the negative of the error value evenly across only the likely erroneous states. This is called guided probabilistic compensation, as compensation is not exact when errors occur simultaneously in more than one state. A feedback controller is used for dynamic voltage overscaling (DVOS) while keeping the error rate in the system within an acceptable range. It is shown that the low cost accurate error compensation allows significant power savings with minimal degradation in system performance (SNR).
  • Keywords
    circuit feedback; delay circuits; digital arithmetic; digital filters; error correction codes; flip-flops; low-power electronics; power aware computing; DSP applications; DVOS; SNR loss; arithmetic circuitry; circuit path delay; distance-2 checksum codes; dynamic voltage overscaling; error compensation; error control; error detection; error diagnosis; feedback controller; guided probabilistic checksum; linear digital filter; low cost checksum codes; low-power digital filter; low-precision shadow latches; power optimization; power saving; Decision support systems; Error correcting codes; guided compensation; low-power filter.; voltage scaling;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/TC.2010.277
  • Filename
    5674023