DocumentCode :
1411128
Title :
Gate layout and bonding pad structure of a RF n-MOSFET for low noise performance
Author :
Cheon Soo Kim ; Jung-Woo Park ; Hyun Kyu Yu ; Cho, H.
Author_Institution :
Microelectron. Technol. Lab., Electron. & Telecommun. Res. Inst., Taejeon, South Korea
Volume :
21
Issue :
12
fYear :
2000
Firstpage :
607
Lastpage :
609
Abstract :
Several 0.35 μm n-MOSFETs with different gate geometry were analyzed to maximize the RF performance, after that the pads were shielded to ground to reduce the noise contribution of pads. The Fmin of 0.5 dB was improved by utilizing the ground-shielded pads, and the Fmin of 0.2 dB was improved by using the double-sided gate contact type. The n-MOSFET having the single-sided gate contact and ground-shielded pad showed the Fmin of 0.46 dB and 0.37 dB at 2 GHz with the drain current of 2.0 mA and 5.3 mA, respectively. Furthermore, the weak frequency dependency of the Fmin showed a great possibility of a low noise amplifier above 5 GHz.
Keywords :
MOSFET; UHF field effect transistors; microwave field effect transistors; semiconductor device measurement; semiconductor device noise; 0.35 mum; 2 GHz; 2 mA; 5 GHz; 5.3 mA; RF n-MOSFET; RF performance; bonding pad structure; double-sided gate contact; drain current; gate geometry; gate layout; ground-shielded pads; low noise amplifier; low noise performance; noise contribution; single-sided gate contact; weak frequency dependency; Atherosclerosis; Bonding; CMOS technology; Geometry; Low-noise amplifiers; MOSFET circuits; Noise reduction; Performance analysis; Radio frequency; Radiofrequency amplifiers;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/55.887481
Filename :
887481
Link To Document :
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