DocumentCode :
1411216
Title :
Pentium Pro processor design for test and debug
Author :
Carbine, Adrian ; Feltham, Derek
Author_Institution :
Intel Corp., Hillsboro, OR, USA
Volume :
15
Issue :
3
fYear :
1998
Firstpage :
77
Lastpage :
82
Abstract :
The need to quickly ramp a complex, high-performance microprocessor into high-volume manufacturing with low defect rates led this design team to a custom, low-area DFT approach and a manually written test methodology that targeted several fault models. Their approach effectively balanced testability needs with other design constraints, while enabling excellent time to market and test quality
Keywords :
computer debugging; computer testing; microprocessor chips; Pentium Pro; debug; high-performance microprocessor; processor design; test; testability; Central Processing Unit; Circuit testing; Costs; Design for testability; Manufacturing processes; Microprocessors; Power dissipation; Power generation economics; Process design; Production;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/54.706037
Filename :
706037
Link To Document :
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