DocumentCode :
1411229
Title :
Test strategy for the PowerPC 750 microprocessor
Author :
Pyron, Carol ; Prado, Javier ; Golab, James
Author_Institution :
Motorola Inc., Austin, TX, USA
Volume :
15
Issue :
3
fYear :
1998
Firstpage :
90
Lastpage :
97
Abstract :
Time-to-market goals are intricately entwined with the product testing strategy for a high-performance microprocessor. The result is an on-time product introduction coupled with improved, more effective and thorough testing
Keywords :
computer testing; microprocessor chips; PowerPC 750; high-performance microprocessor; on-time product introduction; product testing; product testing strategy; time-to-market; Assembly; Automatic testing; Benchmark testing; Built-in self-test; CMOS technology; Circuit testing; Logic testing; Memory management; Microprocessors; Power system management;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/54.706039
Filename :
706039
Link To Document :
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