A D&T roundtable: challenges for low-power and high-performance chips

Microprocessor and other lC performance continues to improve at historic rates, with no visible end in sight for the next 10 years. However, we are starting to encounter a power wall. This is true for high-performance components as well as for low-power chips with a very limited energy budget offered by batteries. We need to find ways to manage power and energy consumption on all fronts-technology, design, and architecture-without compromising performance. Otherwise, we may face discontinuation of Moore´s law for the semiconductor industry in the near future. This would be triggered not by any difficulty in the scaling of process technology but by formidable barriers posed by packaging and cooling, inefficacy of power delivery, and energy constraints dictated by battery technology, which is advancing at a very lukewarm pace.