DocumentCode :
1412742
Title :
Efficient Stochastic Decoding of Non-Binary LDPC Codes with Degree-Two Variable Nodes
Author :
Sarkis, Gabi ; Gross, Warren J.
Author_Institution :
Dept. of Electr. & Comput. Eng., McGill Univ., Montreal, QC, Canada
Volume :
16
Issue :
3
fYear :
2012
fDate :
3/1/2012 12:00:00 AM
Firstpage :
389
Lastpage :
391
Abstract :
In this letter, we present an optimized version of the relaxed half-stochastic (RHS) algorithm targeted at non-binary LDPC codes with a variable node degree equal to two. The new algorithm has significantly fewer multiplications while maintaining an error-correction performance and a decoding iteration count identical to those of the original.
Keywords :
decoding; error correction codes; parity check codes; stochastic processes; decoding iteration; degree-two variable nodes; error-correction performance; nonbinary LDPC codes; relaxed half-stochastic algorithm; stochastic decoding; Complexity theory; Decoding; Equations; Iterative decoding; Mathematical model; Vectors; LDPC codes; non-binary; stochastic decoding;
fLanguage :
English
Journal_Title :
Communications Letters, IEEE
Publisher :
ieee
ISSN :
1089-7798
Type :
jour
DOI :
10.1109/LCOMM.2011.122211.111737
Filename :
6120101
Link To Document :
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