Title : 
Synthesis of delay networks for an analogue computer
         
        
        
        
        
        
            fDate : 
9/1/1965 12:00:00 AM
         
        
        
        
            Abstract : 
The merits and limitations of simulating a time delay by means of active RC networks are considered. The various methods of determining transfer functions which approximate to that of a pure delay, are discussed. Optimum all-pass and low-pass transfer functions based on a minimum-mean-square-error criterion are derived and compared to the Padé functions and equal-ripple envelope delay functions. The relative merits of the low-pass and all-pass approximations are discussed. Some methods of implementing the optimum transfer functions on an analogue computer are described.
         
        
            Keywords : 
computer applications; delay circuits; quadripole networks;
         
        
        
            Journal_Title : 
Electrical Engineers, Proceedings of the Institution of
         
        
        
        
        
            DOI : 
10.1049/piee.1965.0296